This invention relates to a semiconductor integrated circuit device, and more particularly to the techniques effectively utilized for a static RAM (random access memory) consisting of a bipolar-CMOS (complementary MOS) having interchangeability with an ECL (emitter coupled logic) circuit, which is a so-called ECL interfaceable bipolar-CMOS.
There is a static RAM consisting of a bipolar-CMOS using an ECL circuit as an input/output circuit, in which a memory cell is formed with a CMOS circuit with efforts made toward the increasing of integration and the reducing of power consumption. This static RAM requires a level conversion circuit adapted to convert a signal of an ECL level of a small amplitude into that of a CMOS level. An example of the static RAM consisting of a bipolar-CMOS provided with such a level conversion circuit is discussed, for example, in the 1989 1SSCC Digest of Technical Papers, pages 38-40.
A conventional static RAM consisting of a bipolar-CMOS, a typical example of which is disclosed in the above-mentioned publication, requires a level converter for converting a signal of an ECL level into that of a CMOS level and uses a CMOS circuit, which lowers an operation speed of the RAM accordingly.